Bit Bang em c

[Doth]

Ola estou procurando ja faz algum tempo a tal da segunda serial por bit-bang em C sera que alguem tem ou viu em algum lugar?

[ftegon]

Ola!

Procura por Siemens apnote AP083101

Ate+

Fabio Tegon

[Ander_sil]

Pronto em C eu não tenho, mas pode estudar esse exemplo em asm e fazer em C, parece simples de implementar.

Código: Selecionar todos

*
* "Bit-bang" serial I/O functions for the 8051.
*
* These routines transmit and receive serial data using two general
* I/O pins, in 8 bit, No parity, 1 stop bit format. They are useful
* for performing serial I/O on 8051 derivatives not having an
* internal UART, or for implementing a second serial channel.
*
* Dave Dunfield - May 17, 1994
*
* NOTE that R0 and R1 are used by the functions. You may wish to
* add PUSH/POP instructions to save/restore these registers.
*
TXD   EQU   P1.0      Transmit on this pin
RXD   EQU   P1.1      Receive on this pin
* The serial baud rate is determined by the processor crystal, and
* this constant which is calculated as: (((crystal/baud)/12) - 5) / 2
BITTIM   EQU   45      (((11059200/9600)/12) - 5) / 2
*
* Transmit character in A via TXD line
*
putc   CLR   TXD      Drop line for start bit
   MOV   R0,#BITTIM   Wait full bit-time
   DJNZ   R0,*      For START bit
   MOV   R1,#8      Send 8 bits
putc1   RRC   A      Move next bit into carry
   MOV   TXD,C      Write next bit
   MOV   R0,#BITTIM   Wait full bit-time
   DJNZ   R0,*      For DATA bit
   DJNZ   R1,putc1   write 8 bits
   SETB   TXD      Set line high
   RRC   A      Restore ACC contents
   MOV   R0,#BITTIM   Wait full bit-time
   DJNZ   R0,*      For STOP bit
   RET
*
* Receive a character from the RXD line and return in A
*
getc   JB   RXD,*      Wait for start bit
   MOV   R0,#BITTIM/2   Wait 1/2 bit-time
   DJNZ   R0,*      To sample in middle
   JB   RXD,getc   Insure valid
   MOV   R1,#8      Read 8 bits
getc1   MOV   R0,#BITTIM   Wait full bit-time
   DJNZ   R0,*      For DATA bit
   MOV   C,RXD      Read bit
   RRC   A      Shift it into ACC
   DJNZ   R1,getc1   read 8 bits
   RET         go home


até+

[Doth]

Sim pessoal estou tentando adptar para c exatamente essa funçao em assenbly.
Eu so necessito da segunda recepcção, mas a minha adptação esta dando erros que não entendo.


unsigned char _receive_char_serial_1(){
_asm
RXD2 bit 0xB7
BITTIM EQU 45
RXD_2:
push 00h;
push 01h;
;push R0;
;push R1;
RXD_LOOP:

jb RXD2,$ ;//Wait for start bit
mov R0,#BITTIM/2 ;//Wait 1/2 bit-time
djnz R0,$ ;//To sample in middle
jb RXD2,RXD_LOOP ;//Insure valid
mov R1,#8 ;//Read 8 bits
getc1:
mov R0,#BITTIM ;Wait full bit-time
djnz R0,$ ;//For DATA bit
mov C,RXD2 ;//Read bit
rrc A ;//Shift it into ACC
djnz R1,getc1 ;read 8 bits
mov _tmp,a

; pop R1
; pop R0
pop 01h
pop 00h
ret ;go home

_endasm;
return tmp;
}

e olhem so os erros que dah.

COMPILANDO ARQUIVO (C)
removing Technik.rel
?ASxxxx-Error-<o> in line 962 of Technik.asm
<o> .org in REL area or directive / mnemonic error
?ASxxxx-Error-<o> in line 963 of Technik.asm
<o> .org in REL area or directive / mnemonic error
?ASxxxx-Error-<o> in line 965 of Technik.asm
<o> .org in REL area or directive / mnemonic error
?ASxxxx-Error-<o> in line 966 of Technik.asm
<o> .org in REL area or directive / mnemonic error
?ASxxxx-Error-<r> in line 971 of Technik.asm
<r> relocation error
?ASxxxx-Error-<o> in line 984 of Technik.asm
<o> .org in REL area or directive / mnemonic error
?ASxxxx-Error-<o> in line 985 of Technik.asm
<o> .org in REL area or directive / mnemonic error


Alguem viu o problema? tipo estou usando o SDCC.

P.S. o apnote da Siemens so tem a explicação em pdf mais nada.

Obrigado
//Ricardo Doth

[ftegon]

Ola!

Em
http://www.c51.de/c51.de/Dateien/Liste. ... 43&suchen=

Esta a ap083101 (pdf e arquivo zip com os fontes)

Ate+

Fabio Tegon

[Doth]

Ola ftegon eu olhei o link que voce passou e no .zip so ah o pdf, tem certeza de que voce viu mesmo o codigo fonte?

Obrigado
//Ricardo Doth

[ftegon]

Ola!

Realmente não tem , nem no site da infineon (antiga siemens), mas eu tenho os fontes. (obs nunca compilei os mesmos, mas devem funcionar ok pois a siemens não iria publicar um ap note furada)

Desculpe o transtorno.

Ate+

Fabio Tegon



// 4 arquivos concatenados C513_ext.h, usa_defi.h, usa_emul.c, usa_test.c



//----------------------------------------------------- C513_ext.h -------------------------------------------------------------

/*
********************************************************************************
SIEMENS C513 Special Function Registers (SFR) and SFR-Bits
--------------------------------------------------------------------------------
PROGRAM can be used for all C511/C513 programs
--------------------------------------------------------------------------------
MODUL NAME sfr_c513.h
--------------------------------------------------------------------------------
DESCRIPTION Include file with SFR and SFR-Bit defintions
(can be used in combination with reg51.h)
--------------------------------------------------------------------------------
VERSION V1.0
--------------------------------------------------------------------------------
COMPILER Keil PK51 Eval V5.02
--------------------------------------------------------------------------------
DATE 16/10/95
--------------------------------------------------------------------------------
MODIFICATIONS none
********************************************************************************
*/

/******************************************************************************/
/* SFR Register Definition */
/******************************************************************************/
sfr SSCCON = 0xE8; /* SSC Control Register */
sfr STB = 0xE9; /* SSC Transmit Register */
sfr SRB = 0xEA; /* SSC Receive Register */
sfr SSCMOD = 0xEB; /* SSC Mode Test Register */
sfr SCF = 0xF8; /* SSC Status Register */
sfr SCIEN = 0xF9; /* SSC Interrupt Enable Register */

sfr T2CON = 0xC8; /* Timer 2 Control Register */
sfr TL2 = 0xCC; /* Timer 2 Low Byte */
sfr TH2 = 0xCD; /* Timer 2 High Byte */
sfr RC2L = 0xCA; /* Timer 2 Reload/Capture Register, Low Byte */
sfr RC2H = 0xCB; /* Timer 2 Reload/Capture Register, High Byte */

/******************************************************************************/
/* SFR Bit Definition */
/******************************************************************************/
sbit BRS0 = 0xE8; /* SSC Baudrate Select 0 */
sbit BRS1 = 0xE9; /* SSC Baudrate Select 1 */
sbit BRS2 = 0xEA; /* SSC Baudrate Select 2 */
sbit CPHA = 0xEB; /* SSC Clock Phase Select */
sbit CPOL = 0xEC; /* SSC Clock Polarity Control */
sbit MSTR = 0xED; /* SSC Master/Slave Mode Select */
sbit TEN = 0xEE; /* SSC Transmitter Enable */
sbit SCEN = 0xEF; /* SSC System Enable */
sbit TC = 0xF8; /* SSC Transmit Complete Flag */
sbit WCOL = 0xF9; /* SSC Write Collision Flag */


//------------------------------------------------- usa_defi.h --------------------------------------------------------

/******************************************************************************/
/* Application: USART-Emulation File: USA_DEFI.H */
/* Microcontroller: 80C513 (44 PIN PLCC) */
/* */
/* Version: 1.00 10.06.1998 */
/* Written by: J. Hoehne */
/* Department: Siemens HL COM WN SE */
/* */
/* */
/* Task: Test of USART */
/* Emulation via SW */
/******************************************************************************/
/* Modification: Version: Date: Author: */
/* */
/******************************************************************************/


#define ON 1
#define OFF 0
#define HIGH 1
#define LOW 0
#define READ 0
#define WRITE 1
#define HW_USART_4800_BAUD 0xB8
#define HW_USART_9600_BAUD 0xDC
#define HW_USART_19200_BAUD 0xEE
#define SW_USART_4800_BAUD 0x40
#define SW_USART_9600_BAUD 0xA0
#define SW_USART_19200_BAUD 0xD0
/* 12 MHz crystal */
#define USART_8_BIT_VARIABLE_BAUDRATE 0
#define USART_9_BIT_VARIABLE_BAUDRATE 1
#define USART_TRANSMIT_BUFFER_LENGTH 3
#define USART_RECEIVE_BUFFER_LENGTH 3
#define USART_STOP_BIT 1
#define USART_TIMER_INT_DELAY_CORRECTION 0x14
#define USART_EX0_INT_DELAY_CORRECTION 0x09

typedef unsigned char byte;
typedef unsigned int word;



typedef enum
{
USART_INIT_EMULATED_USART_WRITE,
USART_SW_USART_WRITE_OUT,
USART_WHILE_SW_USART_WRITES_OUT,
USART_FINISH_EMULATED_USART_WRITE,
USART_INIT_EMULATED_USART_READ,
USART_HW_USART_WRITE_OUT,
USART_WHILE_SW_USART_READS_IN,
USART_FINISH_EMULATED_USART_READ
} MachineState ;

sbit usart_sw_txd_pin = P3^0;
sbit usart_sw_rxd_pin = P3^1;

sbit usart_hw_usart_txd_pin = P3^1;
sbit usart_hw_usart_rxd_pin = P3^0;

void init_C513_controller (void);

void usart_init_hw_usart (byte usart_temp_operation_mode,
byte usart_temp_baudrate);
void usart_init_sw_usart (byte usart_temp_direction,
byte usart_temp_baudrate);
void usart_disable_hw_usart (void);
void usart_disable_sw_usart (void);
void usart_start_sw_write (byte usart_output_byte);


//---------------------------------------------------------- usa_emul.c ------------------------------------------------------------

/******************************************************************************/
/* Application: USART-Emulation File: USA_EMUL.C */
/* Microcontroller: 80C513 (44 PIN PLCC) */
/* */
/* Version: 1.00 10.06.1998 */
/* Written by: J. Hoehne */
/* Department: Siemens HL COM WN SE */
/* */
/* */
/* Task: Emulation of USART */
/* Interface via SW */
/******************************************************************************/
/* Modification: Version: Date: Author: */
/* */
/******************************************************************************/

#include <REG51.H> // Common 80C51 processor register address table
#include "C513_EXT.h" // Adress table of C513 processor extensions
#include "USA_DEFI.H" // Global emulation program declarations

bit usart_sw_flag_read_ready = OFF;
bit usart_sw_flag_write_ready = OFF;

byte usart_input_byte = 0x22;
byte usart_output_byte = 0x33;
byte usart_sw_direction = READ;
byte usart_sw_baudrate = SW_USART_9600_BAUD;
static byte usart_bit_count = 0;
byte usart_sw_read_timer_start_value = 0xFF;



void usart_init_sw_usart (byte usart_temp_sw_direction,
byte usart_temp_sw_baudrate)
/******************************************************************************/
/* Task: Subroutine for initializing all auxiliary hardware */
/* Version: 1.00 */
/* Date: 10.06.1998 */
/* Author: J. Hoehne / Siemens HL COM WN SE */
/******************************************************************************/
/* Modification: Version: Date: Author: */
/* */
/******************************************************************************/
{
usart_sw_direction = usart_temp_sw_direction;
usart_sw_baudrate = usart_temp_sw_baudrate;

usart_sw_txd_pin = HIGH;
usart_sw_rxd_pin = HIGH;

TR0 = OFF; // Stops Timer 0

TCON = TCON & 0xCC; // TCON-Register
TCON = TCON | 0x01; // TCON.7 = TF1 = x: Timer 1 Overflow Flag (Set by HW)
// TR1 = x: Timer 1 Run Control Bit: RUN
// TF0 = 0: Timer 0 Overflow Flag (Set by HW)
// TR0 = 0: Timer 0 Run Control Bit: STOP
// IE1 = x: Interrupt 1 Flag (Set by HW)
// IT1 = x: Interrupt 1 Typ Control Bit:
// 1 = Falling Edge Triggered
// 0 = Low Level Triggered
// IE0 = 0: Interrupt 0 Flag (Set by HW)
// IT0 = 1: Interrupt 0 Typ Control Bit:
// 1 = Falling Edge Triggered
// 0 = Low Level Triggered

TMOD = TMOD & 0xF0; // Clears T0-Nibble of TMOD-Register
TMOD = TMOD | 0x02; // Sets T0-Nibble to Mode 2
// TMOD.7 = GATE = x: Timer 1 enabled by SW (TR1 bit)
// C/T = x: Timer 1 clock source is external
// oscillator prescaled by 12
// M1 = x Timer 1 Mode 2 is ?
// M2 = x
// GATE = 0: Timer 0 enabled by SW (TR0 bit)
// C/T = 0: Timer 0 clock source is external
// oscillator prescaled by 12
// M1 = 1 Timer 0 Mode 2 is 8 Bit Timer
// M2 = 0 with Auto-Reload

if (usart_sw_direction == WRITE)
{
TL0 = usart_sw_baudrate + USART_TIMER_INT_DELAY_CORRECTION;
// Loads 1 Bit Time and takes into account the number of assembler
// statements executed in timer ISR before shifting out 1st data bit
}
else
{
TL0 = (byte)(0xFF - (0xFF - usart_temp_sw_baudrate + 1)* 1.5 + 1
+ USART_EX0_INT_DELAY_CORRECTION
+ USART_TIMER_INT_DELAY_CORRECTION);
// Loads 1,5 Bit Time to start input
// data sample in the middle of 1st bit;
// takes into account the number of
// assembler statements executed in
// EX0 and Timer ISR's before sampling
// in 1st data bit
usart_sw_read_timer_start_value = TL0;
}

TH0 = usart_temp_sw_baudrate; // Loads 1 Bit Time as Reload Value


IP = IP | 0x03; // Interrupt-Priority-Register
// IP.7 = -
// PSSC = x: SSC Priority Bit
// PT2 = x: Timer 2 Interrupt Priority Bit
// PS = x; Serial Port Interrupt Priority
// PT1 = x: Timer 1 Interrupt Priority Bit
// PX1 = x: External 1 Interrupt Priority
// PT0 = 1: Timer 0 Interrupt Priority Bit
// PX0 = 1: External 0 Interrupt Priority

IE = IE | 0x83; // Interrupt-Enable-Register
// IE.7 = EA = 1: Global Interrupt Enable Bit
// ESSC = x: SSC Interrupt Enable Bit
// ET2 = x: Timer 2 Interrupt Enable Bit
// ES = x: Serial Port Interrupt Enable Bit
// ET1 = x: Timer 1 Interrupt Enable Bit;
// EX1 = x: External Interrupt 1 Enable Bit
// ET0 = 1: Timer 0 Interrupt Enable Bit
// EX0 = 1: External Interrupt 0 Enable Bit
return;
}


void usart_disable_sw_usart(void)
/******************************************************************************/
/* Task: Subroutine for disabling all auxiliary hardware */
/* Version: 1.00 */
/* Date: 10.06.1998 */
/* Author: J. Hoehne / Siemens HL COM WN SE */
/******************************************************************************/
/* Modification: Version: Date: Author: */
/* */
/******************************************************************************/
{
usart_sw_txd_pin = HIGH;
usart_sw_rxd_pin = HIGH;

IE = IE & 0xFC; // Interrupt-Enable-Register
// IE.7 = EA = x: Global Interrupt Enable Bit
// ESSC = X: SSC Interrupt Enable Bit
// ET2 = x: Timer 2 Interrupt Enable Bit
// ES = x: Serial Port Interrupt Enable Bit
// ET1 = x: Timer 1 Interrupt Enable Bit;
// EX1 = x: External Interrupt 1 Enable Bit
// ET0 = 0: Timer 0 Interrupt Enable Bit
// EX0 = 0: External Interrupt 0 Enable Bit


TCON = TCON & 0xCC; // TCON-Register
TCON = TCON | 0x01; // TCON.7 = TF1 = x: Timer 1 Overflow Flag (Set by HW)
// TR1 = x: Timer 1 Run Control Bit: RUN
// TF0 = 0: Timer 0 Overflow Flag (Set by HW)
// TR0 = 0: Timer 0 Run Control Bit: STOP
// IE1 = x: Interrupt 1 Flag (Set by HW)
// IT1 = x: Interrupt 1 Typ Control Bit:
// 1 = Falling Edge Triggered
// 0 = Low Level Triggered
// IE0 = 0: Interrupt 0 Flag (Set by HW)
// IT0 = 1: Interrupt 0 Typ Control Bit:
// 1 = Falling Edge Triggered
// 0 = Low Level Triggered

TMOD = TMOD & 0xF0; // Clears T0-Nibble of TMOD-Register
TMOD = TMOD | 0x02; // Sets T0-Nibble to Mode 2
// TMOD.7 = GATE = x: Timer 1 enabled by SW (TR1 bit)
// C/T = x: Timer 1 clock source is external
// oscillator prescaled by 12
// M1 = x Timer 1 Mode 2 is ?
// M2 = x
// GATE = 0: Timer 0 enabled by SW (TR0 bit)
// C/T = 0: Timer 0 clock source is external
// oscillator prescaled by 12
// M1 = 1 Timer 0 Mode 2 is 8-Bit
// M2 = 0 Auto-Reload operation

IP = IP & 0xFC; // Interrupt-Priority-Register
// IP.7 = -
// PSSC = X: SSC Priority Bit
// PT2 = x: Timer 2 Interrupt Priority Bit
// PS = x; Serial Port Interrupt Priority
// PT1 = x: Timer 1 Interrupt Priority Bit
// PX1 = x: External 1 Interrupt Priority
// PT0 = 0: Timer 0 Interrupt Priority Bit
// PX0 = 0: External 0 Interrupt Priority

return;
}





void usart_start_sw_write(byte usart_temp_output_byte)
/******************************************************************************/
/* Task: Subroutine for starting data transmission via SW-USART*/
/* Version: 1.00 */
/* Date: 10.06.1998 */
/* Author: J. Hoehne / Siemens HL COM WN SE */
/******************************************************************************/
/* Modification: Version: Date: Author: */
/* */
/******************************************************************************/
{

usart_bit_count = 0; // Resets bit counter in timer ISR

TL0 = usart_sw_baudrate + USART_TIMER_INT_DELAY_CORRECTION;
// Loads 1 Bit Time and takes into account the number of assembler
// statements executed in timer ISR before shifting out 1st data bit
usart_output_byte = usart_temp_output_byte;

usart_sw_txd_pin = 0; // Transmits Start Bit

TR0 = ON; // Starts Timer 0 loaded with 1 Bit Time

return;

}



void usart_int0_interrupt_service(void) interrupt 0
/******************************************************************************/
/* Task: Interrupt service routine for handling EX0 Interrupts */
/* Version: 1.00 */
/* Date: 10.06.1998 */
/* Author: J. Hoehne / Siemens HL COM WN SE */
/******************************************************************************/
/* Modification: Version: Date: Author: */
/* */
/******************************************************************************/
{

TR0 = ON; // Starts Timer 0 loaded with 1,5 Bit Time
EX0 = OFF; // Disables EX0 Interrupt for all received data bits
}




void ussc_timer0_interrupt_service(void) interrupt 1
/******************************************************************************/
/* Task: Interrupt service routine for handling Timer0 Inter. */
/* Version: 1.00 */
/* Date: 10.06.1998 */
/* Author: J. Hoehne / Siemens HL COM WN SE */
/******************************************************************************/
/* Modification: Version: Date: Author: */
/* */
/******************************************************************************/
{
static byte usart_input_mask = 0x01;

if ( usart_sw_direction == WRITE)
{
if (++usart_bit_count != 10) // Data Bit and Stop Bit shift out
{
usart_sw_txd_pin = (bit)(usart_output_byte & 0x01);// Shifts out LSB
usart_output_byte = (usart_output_byte >> 1) | 0x80;
} // Generates a new LSB and fills the MSB with '1',
// which is partly used as Stop Bit later on.
else
{
TR0 = OFF; // Timer Stop after Stop Bit transmission
usart_bit_count = 0; // Resets bit counter
usart_sw_flag_write_ready = ON;
}
}
else // usart_sw_direction == READ
{
if (usart_sw_rxd_pin != 0)
{
usart_input_byte |= usart_input_mask;// The only '1' bit in 'usart_
} // input_mask' points to the bit of 'usart_input_
// byte' to be currently read in.

else // usart_sw_rxd_pin == 0
{
usart_input_byte &= ~usart_input_mask;//The only '0' bit in '~usart_
} // input_mask' points to the bit of 'usart_input_
// byte' to be currently read in.

usart_input_mask = usart_input_mask << 1;// Points to next higher bit

if (++usart_bit_count == 8) // Stop Bit is ignored
{
TR0 = OFF;
TL0 = usart_sw_read_timer_start_value;
usart_bit_count = 0; // Resets bit count
usart_input_mask = 0x01;// Resets usart_input_mask to LSB
usart_sw_flag_read_ready = ON;
IE0 = OFF; // Resets EX0 Flags set by received
// '0' data bits
EX0 = ON; // Enables EX0 Interrupt
}
}

}



//-------------------------------------------- usa_test.c -------------------------------------------------------------------------



/******************************************************************************/
/* Application: USART-Emulation File: USA_TEST.C */
/* Microcontroller: 80C513 (44 PIN PLCC) */
/* */
/* Version: 1.00 10.06.1998 */
/* Written by: J. Hoehne */
/* Department: Siemens HL COM WN SE */
/* */
/* Task: Test of USART */
/* Emulation via SW */
/******************************************************************************/
/* Modification: Version: Date: Author: */
/* */
/******************************************************************************/

#include <REG51.h> // Common 80C51 processor register address table
#include "C513_EXT.h" // Adress table of C513 processor extensions
#include "USA_DEFI.H" // Global emulation program declarations


bit usart_hw_flag_read_ready;
bit usart_hw_flag_write_ready;

extern bit usart_sw_flag_read_ready;
extern bit usart_sw_flag_write_ready;



byte usart_transmit_byte_number = 0;
byte usart_transmit_buffer[USART_TRANSMIT_BUFFER_LENGTH]
= {0xAA, 0x55, 0x66};
byte usart_receive_byte_number = 0;
byte usart_receive_buffer[USART_RECEIVE_BUFFER_LENGTH]
= {0x00, 0x00, 0x00};
extern byte usart_input_byte;

byte usart_error;



main()
/******************************************************************************/
/* Task: Sets up a continous running loop with different jobs: */
/* - starts HW-USART and transfers data to Emulated USART*/
/* - starts Emulated USART and transfers data to HW USART*/
/* Version: 1.00 */
/* Date: 10.06.1998 */
/* Author: J. Hoehne / Siemens HL COM WN SE */
/******************************************************************************/
/* Modification: Version: Date: Author: */
/* */
/******************************************************************************/
{

MachineState next_machine_state = USART_INIT_EMULATED_USART_WRITE;

init_C513_controller();

while (1)
{
switch(next_machine_state) // State machine for handling data transmis.
{
case USART_INIT_EMULATED_USART_WRITE:// State for Init HW & SW USART
usart_init_sw_usart (WRITE,
SW_USART_19200_BAUD);

usart_init_hw_usart (USART_8_BIT_VARIABLE_BAUDRATE,
HW_USART_19200_BAUD);
usart_transmit_byte_number = 0;
usart_receive_byte_number = 0;
next_machine_state = USART_SW_USART_WRITE_OUT;
break;

case USART_SW_USART_WRITE_OUT: // State for SW-USART Data Write
usart_start_sw_write(usart_transmit_buffer
[usart_transmit_byte_number++]);
next_machine_state = USART_WHILE_SW_USART_WRITES_OUT;
break;

case USART_WHILE_SW_USART_WRITES_OUT:// State for transm. idle loop
/***********************************************/
/* */
/* User application code to be executed during */
/* SW-USART data transfer may be inserted here */
/* */
/***********************************************/
if (usart_sw_flag_write_ready == ON)
{
usart_sw_flag_write_ready = OFF;
if (usart_transmit_byte_number
< USART_TRANSMIT_BUFFER_LENGTH)
{
next_machine_state = USART_SW_USART_WRITE_OUT;
}
else
{
next_machine_state = USART_FINISH_EMULATED_USART_WRITE;
}
}
break;

case USART_FINISH_EMULATED_USART_WRITE: // State for HW disable
usart_disable_hw_usart ();
usart_disable_sw_usart();
next_machine_state = USART_INIT_EMULATED_USART_READ;
break;




case USART_INIT_EMULATED_USART_READ:// State for Init HW & SW USART
usart_init_hw_usart (USART_8_BIT_VARIABLE_BAUDRATE,
HW_USART_19200_BAUD);
usart_init_sw_usart (READ,
SW_USART_19200_BAUD);
usart_transmit_byte_number = 0;
usart_receive_byte_number = 0;
next_machine_state = USART_HW_USART_WRITE_OUT;
break;

case USART_HW_USART_WRITE_OUT: // State for HW-USART Data Write
SBUF = usart_transmit_buffer[usart_transmit_byte_number++];
next_machine_state = USART_WHILE_SW_USART_READS_IN;
break;

case USART_WHILE_SW_USART_READS_IN: // State for receive idle loop
/***********************************************/
/* */
/* User application code to be executed during */
/* SW-USART data reception may be inserted here*/
/* */
/***********************************************/
if (usart_sw_flag_read_ready == ON)
{
usart_sw_flag_read_ready = OFF;
usart_receive_buffer[usart_receive_byte_number++]
= usart_input_byte;

if (usart_receive_byte_number < USART_RECEIVE_BUFFER_LENGTH)
{
next_machine_state = USART_HW_USART_WRITE_OUT;
}
else
{
next_machine_state = USART_FINISH_EMULATED_USART_READ;
}
}
break;

case USART_FINISH_EMULATED_USART_READ:// State for HW disable
usart_disable_hw_usart ();
usart_disable_sw_usart();
next_machine_state = USART_INIT_EMULATED_USART_WRITE;
break;


default: // State for programming error
usart_error = 1;
break;

} // end switch

} // end while (1)
}




void usart_init_hw_usart (byte usart_temp_hw_operation_mode,
byte usart_temp_hw_baudrate)
/******************************************************************************/
/* Task: Auxiliary subroutine for initializing USART hardware */
/* Version: 1.00 */
/* Date: 10.06.1998 */
/* Author: J. Hoehne / Siemens HL COM WN SE */
/******************************************************************************/
/* Modification: Version: Date: Author: */
/* */
/******************************************************************************/
{

usart_hw_usart_rxd_pin = HIGH; // Enables Alternate Function
usart_hw_usart_txd_pin = HIGH; // Enables Alternate Function

switch (usart_temp_hw_operation_mode)
{
case USART_8_BIT_VARIABLE_BAUDRATE:
SCON = 0x50; // SCON-Register
// SCON.7 = SM0 = 0: |
// > 8 Bit with var. Baudrate
// SM1 = 1: |
// SM2 = 0: Multiprocessor
// Communication Enable
// REN = 1: Receiver Enable
// TB8 = 0: 9th data bit to be transmit
// RB8 = 0: 9th data bit to be received
// TI = 0: Transmit Interrupt Flag
// RI = 0: Receive Interrupt Flag
break;

case USART_9_BIT_VARIABLE_BAUDRATE:
SCON = 0xD0; // SCON-Register
// SCON.7 = SM0 = 1: |
// > 9 Bit with var. Baudrate
// SM1 = 1: |
// SM2 = 0: Multiprocessor
// Communication Enable
// REN = 1: Receiver Enable
// TB8 = 0: 9th data bit to be transmit
// RB8 = 0: 9th data bit to be received
// TI = 0: Transmit Interrupt Flag
// RI = 0: Receive Interrupt Flag
break;
}

RC2H = 0xFF;
RC2L = usart_temp_hw_baudrate;

TL2 = 0xFF;
TH2 = 0xFF;

T2CON = 0x34; // Enables Timer2 as Baudrate Generator for HW-USART
// T2CON.7 = TF2 = 0: Timer 2 Overflow Flag
// EXF2 = 0: Timer 2 External Flag
// RCLK = 1 Timer 2 used for Receive Clock
// TCLK = 1 Timer 2 used for Transmit Clock
// EXEN2= 0: Timer 2 External enable
// TR2 = 1: Timer 2 Start Bit
// C/T2 = 0 Timer / Counter Select
// CP/R = 0 Capture / Reload Select

IP = IP | 0x20;// Interrupt-Priority-Register
// IP.7 = -
// PSSC = x: SSC Priority Bit
// PT2 = x: Timer 2 Interrupt Priority Bit
// PS = 1; Serial Port Interrupt Priority Bit
// PT1 = x: Timer 1 Interrupt Priority Bit
// PX1 = x: External 1 Interrupt Priority Bit
// PT0 = x: Timer 0 Interrupt Priority Bit
// PX0 = x: External 0 Interrupt Priority Bit

IE = IE & 0xDF;// Interrupt-Enable-Register
IE = IE | 0x90;// IE.7 = EA = 1: Global Interrupt Enable Bit
// ESSC = x: SSC Interrupt Enable Bit
// ET2 = 0: Timer 2 Interrupt Enable Bit
// ES = 1: Serial Port Interrupt Enable Bit
// ET1 = x: Timer 1 Interrupt Enable Bit;
// EX1 = x: External Interrupt 1 Enable Bit
// ET0 = x: Timer 0 Interrupt Enable Bit
// EX0 = x: External Interrupt 0 Enable Bit

return;
}



void usart_disable_hw_usart (void)
/******************************************************************************/
/* Task: Auxiliary subroutine for disabling USART hardware */
/* Version: 1.00 */
/* Date: 10.06.1998 */
/* Author: J. Hoehne / Siemens HL COM WN SE */
/******************************************************************************/
/* Modification: Version: Date: Author: */
/* */
/******************************************************************************/
{

SCON = 0x40; // SCON-Register
// SCON.7 = SM0 = 0: Serial Mode Select Bit|
// > 8 Bit UART
// SM1 = 1: Serial Mode Select Bit|
// SM2 = 0: Multiprocessor Communication Enable
// REN = 0: Receiver Enable
// TB8 = 0: 9th data bit to be transmitted
// RB8 = 0: 9th data bit to be received
// TI = 0: Transmit Interrupt Flag
// RI = 0: Receive Interrupt Flag

T2CON = 0x00; // Disables Timer2 as Baudrate Generator for HW-USART
// T2CON.7 = TF2 = 0: Timer 2 Overflow Flag
// EXF2 = 0: Timer 2 External Flag
// RCLK = 0 Timer 2 used for Receive Clock
// TCLK = 0 Timer 2 used for Transmit Clock
// EXEN2= 0: Timer 2 External enable
// TR2 = 0: Timer 2 Start Bit
// C/T2 = 0 Timer / Counter Select
// CP/R = 0 Capture / Reload Select

IP = IP & 0xEF;// Interrupt-Priority-Register
// IP.7 = -
// PSSC = x: SSC Priority Bit
// PT2 = x: Timer 2 Interrupt Priority Bit
// PS = 0; Serial Port Interrupt Priority Bit
// PT1 = x: Timer 1 Interrupt Priority Bit
// PX1 = x: External 1 Interrupt Priority Bit
// PT0 = x: Timer 0 Interrupt Priority Bit
// PX0 = x: External 0 Interrupt Priority Bit

IE = IE & 0xCF;// Interrupt-Enable-Register
// IE.7 = EA = x: Global Interrupt Enable Bit
// ESSC = x: SSC Interrupt Enable Bit
// ET2 = 0: Timer 2 Interrupt Enable Bit
// ES = 0: Serial Port Interrupt Enable Bit
// ET1 = x: Timer 1 Interrupt Enable Bit;
// EX1 = x: External Interrupt 1 Enable Bit
// ET0 = x: Timer 0 Interrupt Enable Bit
// EX0 = x: External Interrupt 0 Enable Bit

return;
}


void usart_hw_interrupt_service(void) interrupt 4
/******************************************************************************/
/* Task: Interrupt service routine for handling USART requests */
/* Version: 1.00 */
/* Date: 10.06.1998 */
/* Author: J. Hoehne / Siemens HL COM WN SE */
/******************************************************************************/
/* Modification: Version: Date: Author: */
/* */
/******************************************************************************/
{

if (RI == ON) // Read in completion interrupt
{
RI = OFF;
usart_receive_buffer[usart_receive_byte_number++] = SBUF;
usart_hw_flag_read_ready = ON;
}
else
{
TI = OFF; // Write out completion interrupt
usart_hw_flag_write_ready = ON;
}

return;
}


void init_C513_controller(void)
/******************************************************************************/
/* Task: Auxiliary subroutine for initializing C513 controller */
/* Version: 1.00 */
/* Date: 10.06.1998 */
/* Author: J. Hoehne / Siemens HL COM WN SE */
/******************************************************************************/
/* Modification: Version: Date: Author: */
/* */
/******************************************************************************/
{

EA = OFF; // Disables all interrupts

P0 = 0xFF; // Port 0 register
// Sets up port output drivers to 'Tristate'

P1 = 0xFF; // Port 1 register
// Sets up port latches to enable
// alternate functions

P2 = 0xFF; // Port 2 register
// Sets up port output drivers to 'Tristate'

P3 = 0xFF; // Port 3 register
// Sets up port latches to enable
// alternate functions

PCON = 0x00; // Power Control Register
// PCON.7 = SMOD = 0: Prescaler enabled
// -
// -
// -
// GF1 = 0: General Purpose Flag Bit
// GF0 = 0: General Purpose Flag Bit
// PDE = 0: Power Down Bit disabled
// IDLE = 0: Idle Mode Bit disabled

SSCCON = 0x07; // Disables HW_SSC
// SSCCON.7 = SCEN = 0: SSC subsystem is disabled
// SSCCON.6 = TEN = 0: SSC transmitter is disabled
// SSCCON.5 = MSTR = 0: SSC slave mode is selected
// SSCCON.4 = CPOL = 0: SSC clock idle state is 'LOW'
// SSCCON.3 = CPHA = 0: SSC 2nd clock edge shifts data
// SSCCON.7 = BRS2 = 1: SSC baud rate selection bit
// SSCCON.7 = BRS1 = 1: SSC baud rate selection bit
// SSCCON.7 = BRS0 = 1: SSC baud rate selection bit

SCIEN = 0x00; // SSC Interrupt Enable Register
// SCIEN.7 = -
// SCIEN.6 = -
// SCIEN.5 = -
// SCIEN.4 = -
// SCIEN.3 = -
// SCIEN.2 = -
// SCIEN.1 = WCEN = 0: Write Collision Interrupt Bit
// SCIEN.0 = TCEN = 0: Transfer Completion Interrupt

TMOD = 0x11; // TMOD-Register
// TMOD.7 = GATE = 0: Timer 1 enabled by sw (TR1 bit)
// C/T = 0: Timer 1 clock source is external
// oscillator prescaled by 12
// M1 = 0 Timer 1 Mode 1 is 16-Bit timer
// M2 = 1 for baudrate generation
// GATE = 0: Timer 0 enabled by sw (TR1 bit)
// C/T = 0: Timer 0 clock source is external
// oscillator prescaled by 12
// M1 = 0 Timer 0 Mode 1 is 16-Bit timer
// M2 = 1 operation

TL0 = 0x00; // Timer 0 Low Byte

TH0 = 0x00; // Timer 0 High Byte

TL1 = 0x00; // Timer 1 Low Byte

TH1 = 0x00; // Timer 1 High Byte

TCON = 0x05; // TCON-Register
// TCON.7 = TF1 = 0: Timer 1 Overflow Flag (Set by HW)
// TR1 = 0: Timer 1 Run Control Bit: RUN
// TF0 = 0: Timer 0 Overflow Flag (Set by HW)
// TR0 = 0: Timer 0 Run Control Bit: STOP
// IE1 = 0: Interrupt 1 Edge Flag (Set by HW)
// IT1 = 1: Interrupt 1 Typ Control Bit:
// 1 = Falling Edge Triggered
// 0 = Low Level Triggered
// IE0 = 0: Interrupt 0 Edge Flag (Set by HW)
// IT0 = 1: Interrupt 0 Typ Control Bit:
// 1 = Falling Edge Triggered
// 0 = Low Level Triggered

TL2 = 0x00; // Timer 2 Low Byte

TH2 = 0x00; // Timer 2 High Byte

T2CON= 0x00; // T2CON-Register
// T2CON.7= TF2 = 0: Timer 2 Overflow Flag (Set by HW)
// EXF2 = 0: Timer 2 External Flag
// RCLK = 0: Timer 2 used as Baudrate Generator
// for Serial Receive
// TCLK = 0: Timer 2 used as Baudrate Generator
// for Serial Transmit
// EXEN2= 0: Timer 2 External Enable
// TR2 = 0: Timer 2 Run Control Bit:
// 1 = Run
// 0 = Stop
// CT2 = 0: Timer 2 Counter/Timer Select
// 1 = External Event Counter
// 0 = Internal Timer
// C/RL2= 0: Timer 2 Capture/Reload Select:
// 1 = Falling Edge Triggered
// 0 = Low Level Triggered

SCON = 0x40; // SCON-Register
// SCON.7 = SM0 = 0: 8 Bit UART
// SM1 = 1: Mode 1; Variable Baud Rate
// SM2 = 0: Multiprocessor communication dis.
// REN = 0: Serial Reception: 1 = Enabled
// 0 = Disabled
// TB8 = 0: 9th Transmit Data Bit in 9 Bit Mode
// RB8 = x: 9th Receive Data Bit in 9 Bit Mode
// or the Stop Bit received in 8 Bit Mode
// TI = 0: Transmit Interrupt Flag
// RI = 0: Receive Interrupt Flag

IP = 0x00; // Interrupt-Priority-Register
// IP.7 = -
// PSSC = 0: SSC Priority Bit
// PT2 = 0: Timer 2 Interrupt Priority Bit
// PS = 0; Serial Port Interrupt Priority Bit
// PT1 = 0: Timer 1 Interrupt Priority Bit
// PX1 = 0: External 1 Interrupt Priority Bit
// PT0 = 0: Timer 0 Interrupt Priority Bit
// PX0 = 0: External 0 Interrupt Priority Bit

IE = 0x80; // Interrupt-Enable-Register
// IE.7 = EA = 1: Global Interrupt Enable Bit
// ESSC = 0: SSC Interrupt Enable Bit
// ET2 = 0: Timer 2 Interrupt Enable Bit
// ES = 0: Serial Port Interrupt Enable Bit
// ET1 = 0: Timer 1 Interrupt Enable Bit;
// EX1 = 0: External Interrupt 1 Enable Bit
// ET0 = 0: Timer 0 Interrupt Enable Bit
// EX0 = 0: External Interrupt 0 Enable Bit
}

//------------------------------------------------------------------------------------------------------------------------------------------------------------